Semiconductor integrated circuit designs have been generally produced by applying fine patterns of semiconductor regions, electrodes, wiring and other components onto the semiconductor substrate by using conventional process steps, such as chemical vapor deposition (CVD). After the wire pattern is laid down on the device, a multi-layer semiconductor component can be formed through the application of dielectric materials and/or other suitable layers of materials.
Generally, advances in the semiconductor industry are characterized by the introduction of new generations of integrated circuits (ICs) having higher performance and greater functionality than that of previous generations for the purpose of obtaining rapid processing of large amounts of data and information. These advances are often the result of reducing the size of the IC devices; that is, the advances in the integration do not rely upon the expansion of the size or dimension of the device, i.e., the chip, but can be obtained by miniaturizing and increasing the number of components fabricated in the chip and accordingly reducing the dimensions of the chips themselves. As a result, the minimum size of line and space of the wiring in the chips is on the order of submicrons and as a necessity, the wiring structure adopted in current chips is a multi-layer or multi-level wiring or metallization structure.
However, as device geometries in semiconductor wafers approach and then go beyond dimensions as small as 0.25 microns (μm), the dielectric constant of insulating material used between conductive paths, for example silicon oxide (SiO2), becomes an increasingly significant factor in device performance. As the distance between adjacent conductive paths become smaller, the resulting capacitance, a function of the dielectric property of the insulating material divided by the distance between conductive paths, increases. The increase in capacitance causes increased capacitive coupling, or cross-talk, between adjacent conductive paths which carry signals across the chip. The increased capacitance further results in increased power consumption for the IC and an increased RC time constant, the latter resulting in reduced signal propagation speed. In sum, the effects of miniaturization cause increased power consumption, limit achievable signal speed, and degrade noise margins used to insure proper IC device or chip operation.
One way to diminish power consumption and cross talk effects is to decrease the dielectric constant of the insulator, or dielectric, which separates the conductors. Probably the most common semiconductor dielectric is silicon dioxide, which has a dielectric constant (k) of about 3.9. In contrast, air (including partial vacuum) has a dielectric constant of just over 1. Still other insulating materials can provide films having low dielectric constants in the range of approximately 2.0 to 3.0, significantly lower than that of the silicon dioxide films. Therefore, it is well-known that reduced capacitance in the use of certain organic or inorganic insulating materials can result in the alleviation of the aforementioned problems of capacitive coupling and the like. However, any material contemplated for use in semiconductor devices must meet other criteria in addition to a low dielectric constant before it can be used to replace the commonly employed silicon dioxide. For example, any coating material contemplated for use as a dielectric or in conjunction with a dielectric in a semiconductor device should demonstrate the following qualities or characteristics:
1. Excellent Electrical Insulating Properties;
2. High Thermal Stability;
3. Crack Resistance; and
4. Good Adhesion to Underlying Surfaces and/or Coated Surfaces.
Many dielectric materials and related materials have been proposed for use as dielectric film coatings in semiconductor devices, but most of them are considered to be unsatisfactory in meeting the above-mentioned stringent electrical and physical requirements. The dielectric film-forming materials include inorganic materials which are applied over a patterned wiring layered structure by chemical vapor deposition (CVD) processes. Typical examples of useful inorganic dielectric materials include silicon dioxide (SiO2), silicon nitride (Si3N4) and phosphosilicate glass (PSG). The preferred formation of these inorganic dielectrics by CVD processes leaves these inorganic dielectric layers inherently defective because plasma based deposition processes reproduce the uneven and stepped profile structure of the underlying wiring pattern. On the other hand, several organic and organic/inorganic dielectric materials such as polyimide resins, organic SOG (Spin-On-Glass), and other similar dielectric materials have generally been unsatisfactory in one or more of the above-mentioned desired electrical or physical properties of a dielectric coating and/or related materials/coatings. For example, several polyimide resins demonstrate high moisture absorption due to their polarizing chemical structures. Moisture absorption, in turn, causes an undesirable increase in the dielectric constant of the particular polyimide material being used.
Therefore, there is still a need to design and produce low dielectric coating materials that can be used as a replacement for silicon dioxide while having the following properties: a) acts as an excellent electrical insulator in comparison with conventional materials and films/coatings; b) has increased thermal stability over conventional materials and films/coatings; c) is more resistant to cracks and wear than conventional materials and films/coatings; and d) has good adhesion to underlying and/or surrounding surfaces and/or coating surfaces and other adjacent layers, as compared to conventional materials and films.